Istituto di Scienza e Tecnologie dell'Informazione     
Bagnoli P. E., Montesi M., Casarosa C., Pasquinelli G. Fast analytical thermal modeling of electronic devices and circuits with multi-layer stack mountings. In: Electronic Packaging and Technology Conference (Pan Pacific Hotel, Singapore, December 2003). Proceedings, vol. CD-ROM 2003.
In this paper an analytical model for the steady-state temperature mapping of electronic devices and system boards is presented. The main assumptions are that the heat generation may by considered as two-dimensional and that the whole solid structure can be schematically modelled as a stack of several homogeneous layers of different materials and different sizes, also with various degree of asymmetry. The mathematical model is believed to replace conventional finite-element (FEM) thermal simulators for fast thermal mapping, accurate within 1% and able to run in interaction with electrical aand electro-themal automatic design tools. His convenience in terms of spees and calculation amounts is due to the fact that it requires 2-D meshing grids only at the interfaces instead of 3-D. The implemented thermal simulation program was validated by comparing the results of given virtual samples with the corresponding temperature and heat flux maps obtained with FEM analysis. The amount and the origin of the error percentage with respect to the FEM analysis were also investigated as a functions of the free input parameters of the analytical program.
Subject circuits
J.2 Physical Sciences and Engineering

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