PUMA
Istituto di Scienza e Tecnologie dell'Informazione     
Codenotti B., Leoncini M. Global routing in VLSI arrays : an experimental environment. Internal note IEI-B4-20, 1989.
 
 
Abstract
(English)
We study the problem of routing wires in a VLSI 2-dimensional array, with the goal of minimizing the resulting channel width. We develop an experimental environment oriented towards the test of heuristics and the experimental analysis of the average-case channel width needed to route an nxn array. We give a special attention to the role played by the number of turns of the routings.
Subject Global Routing
VLSI array
Pin
Chip
Channel Width
Heuristics
Turns


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