Istituto di Scienza e Tecnologie dell'Informazione     
Codenotti B., Puglisi C. A comparison of the performance of three parallel architectures for matrix-vector multiplication. Internal note IEI-B4-11, 1988.
We present the paralle1 implementation of matrix-vector multiplication on a binary tree of a small number of processor, whose leaves are connected to loca1 memories, each containing one column of the matrix. The performance attained can be favourably compared with the one of the mesh of trees and the linear array, each formed by the same number of processors.
Subject Binary Tree
Mesh of Trees
Linear Array
Matrix-Vector Multiplication
Parallel Computation

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